|
| System Bus |
PCI (32-bit, universal 3.3V & 5V keyed) |
| On-Board FIFO Memory Buffer |
1024 samples |
|
| Number of Channels |
64 |
| Single-Ended Channels |
64 |
| Differential Channels |
32 |
| A/D Chipset |
AD7663 or equivalent |
| A/D Converter Resolution |
16-bit |
| Max. A/D Speed (throughput) |
250KHz |
| A/D Converter Settling Time |
2 to 4µs |
| Channel Queue |
Channel/gain queue lets you choose order of channel sampling, gain per channel, and offset per channel. |
| Accuracy |
Gain Error |
±0.6% of output, max. before calibration. ±0.01% of output, max. after calibration |
| Noise |
CMRR (Common Mode Rejection Ratio) |
83 to 92dB (DC to 60Hz). Common Mode Voltage: ±11V |
Noise |
PCIDAQ 6452HR: 0.95 to 1.9 LSBrms. PCIDAQ 6422HR: 0.8 to 1.2 LSBrms | | Input Impedance Details |
Normal Power On: 1 Gohm/100pF. Power Off: 820 ohm. Overload: 820 ohm |
|
| Bipolar Input Ranges |
-10V to +10V
-5V to +5V
-2.5V to +2.5V
-1.25V to +1.25V |
| Unipolar Input Ranges |
0 to +10V
0 to +5V
0 to +2.5V
0 to +1.25V |
| A/D Range Selection |
Software |
| Gains |
1
2
4
8 |
| Gain Range Details |
Gain may be set on a channel-by-channel basis |
|
| Triggering Type(s) Supported |
Pretrigger (FIFO acquires data until trigger)
Software trigger (software-controlled trigger)
External pulse trigger (triggered by pulse on trigger input)
Analog slope trigger (trigger based on slope of acquired data points)
Counter/timer trigger (triggered by on-board counter/timer) |
|
| Number of Analog Output (D/A) Channels |
2 |
| D/A Chipset |
LTC7545 or equivalent |
| D/A Converter |
Resolution |
12-bit |
Update Rate, All Channels, max |
1MHz | Settling Time, max. |
3µS to 0.5 LSB accuracy | | Bipolar Output Ranges |
-10V to +10V
±external reference |
| Unipolar Output Ranges |
0 to +10V
0 to external reference |
| Output Range Selection |
Software |
| Output Range Details |
Output Driving Current: ±5mA max. |
| Accuracy |
Gain Error |
±0.8% of output max. before calibration
±0.02% of output max. after calibration |
Offset Error |
±80mV max. before calibration
±1mV max. after calibration | Slew Rate |
20V/µS | | Power-On State |
0 volts |
| Output Impedance |
100mΩ |
| Output Protection |
Continuous short to ground |
| Analog Output Features |
FIFO Buffer Size: 512 samples per channel when both channels are enabled for timed output. 1024 samples when only one channel is used for timed output. |
|
| Number of User Channels |
2 |
| Counter/Timer Size |
16-bit |
| Input Frequency, max. |
10MHz |
| Counter Type(s) |
Up/down counter |
| Clock Source(s) |
Programmable counter clock source (internal or external clock up to 10MHz) |
| Counter/Timer Special Features |
- Two general-purpose C/Ts and four A/D counters for precise timing control
- Programmable gate selection (hardware or software control)
- Programmable input and output signal polarities (high active or low active)
- Inital count can be loaded from software
- Current count value can be read-back by software without affecting circuit operation
|
|
| Number of I/O Lines |
24 |
| Digital I/O Details |
Programmable by bank. Compatibility: TTL |
| Primary Digital I/O |
Configuration |
24 bidirectional (three 8-bit ports) |
Digital I/O Chipset |
82C55A | Input/Output Selection |
Software | Inputs |
Input Voltage - High (Vih, DC) |
2V....5V | Input Current, High (Iih) |
20μA | Input Voltage - Low (Vil) |
0mV....0.8V | Input Current, Low (Iil) |
0.2mA | Outputs |
Output Voltage - High (Voh) |
2.7V....5V | Output Voltage - Low (Vol) |
0mV....0.5V | Output Current Sink, max. |
8mA | Output Current Sink Details |
Output Current High (Ioh): 400µA | |
| Software Included - Features |
Win98/200/NT drivers and DLLs, plus LabVIEW and Agilent VEE drivers and an ActiveX controls component library |
| Operating System Compatibility |
Windows NT
Windows 2000
Windows 98
Linux |
| Software Compatibility |
Agilent VEE®
LabVIEW® |
|
| Connector #1 |
Quantity |
2 |
Type |
68-pin (wide SCSI internal D-sub) | Gender |
Female (socket) | Location |
Backplate of board | | Connector #2 |
Quantity |
1 |
Location |
Header on board | | Connector & Cabling Details |
- Two 68-pin VHDCI-type connectors are located on the backplate and used for DIO, A/D, D/A, C/T signaling, etc.
- One 20-pin System Synchronous Interface (SSI) connector is located on the carrier board and provides the DAQ timing synchronization between multiple boards. The bi-directional SSI I/O provides a flexible connection between cards and allows one SSI master to output to the signal and up to three slaves to receive the SSI signal via a special ribbon cable. Note that the SSI signals are designed for card synchronization only, not for external devices.
|
|
| +5V |
2A |
|
| Operating Temperature |
32°F....131°F
(0°C....55°C)
|
| Storage Temperature |
-4°F....158°F
(-20°C....70°C)
|
| Relative Humidity, noncondensing |
10%....90% |
|
| Card Length |
6.89"
(175mm)
|
| Card Height |
4.21"
(107mm)
|
